Valleytronics is an emerging field that offers the potential for faster, scalable and more energy-efficient electronic devices. While valleytronic transistors can reduce heat generation and boost data densities, their operability at room temperature is limited due to strong intervalley scattering.

Supported by the Marie Skłodowska-Curie Actions programme, the MP Valley Transistor project aims to optimise the performance of room-temperature valleytronic transistors. To do so, it will integrate chiral plasmonic nanostructures with a ferromagnetic Fe₃GaTe₂ layer. The former are capable of selectively generating valley-polarised hot carriers in tungsten disulfide, while the magnetic proximity effect caused by Fe₃GaTe₂ further improves their efficiency. Such devices will be able to generate, disseminate, detect and manipulate valley information at room temperature.